A Hardware Track-Trigger for CMS

The work described in this PhD thesis is a study of a real implementation of a track-finder system which could provide reconstructed high transverse momentum tracks to the first-level trigger of the High Luminosity LHC upgrade of the CMS experiment. This is vital for the future success of CMS, since otherwise it will be impossible to achieve the trigger selectivity needed to contain the very high event rates. The unique and extremely challenging requirement of the system is to utilise the enormous volume of tracker data within a few microseconds to arrive at a trigger decision.
The track-finder demonstrator described proved unequivocally, using existing hardware, that a real-time track-finder could be built using present-generation FPGA-based technology which would meet the latency and performance requirements of the future tracker. This means that more advanced hardware customised for the new CMS tracker shouldbe even more capable, and will deliver very significant gains for the future physics returns from the LHC.

Nominated as an outstanding Ph.D. thesis by the CMS Collaboration, CERN, Geneva Provides vital groundwork for future success of CMS experiment Shows that FPGA-based technology can deliver the required performance for a real-time track-finder

Autorentext

Tom studied undergraduate physics Imperial College London, where he became involved in the High Energy Physics group. He graduated with an MSc in Physics in 2014, after completing a one year project on novel tracking techniques for the CMS experiment at the Large Hadron Collider. He remained at Imperial College London for his PhD studies, during which he spent 50% of his time based at CERN, Geneva. In 2018, he completed his PhD studies on the upgraded tracker and trigger of CMS, producing a thesis 'A Hardware Track-Trigger for CMS at the High Luminosity LHC', which was awarded the CMS thesis of the year. Tom now works as a research fellow in the CERN Experimental Physics department, where he continues to develop low-latency trigger algorithms for FPGA processing hardware.

Inhalt
Introduction.- The CMS Phase II Upgrade.- The Track Finder Demonstrator.- The Hough Transform.- The Kalman Filter.- Demonstrator Results.- Outlook and Summary.