MICROELECTRONIC INTERCONNECTIONS AND MICROASSEMBL Y WORKSHOP 18-21 May 1996, Prague, Czech Republic Conference Organizers: George Harman, NIST (USA) and Pavel Mach (Czech Republic) Summary of the Technical Program Thirty two presentations were given in eight technical sessions at the Workshop. A list of these sessions and their chairpersons is attached below. The Workshop was devoted to the technical aspects of advanced interconnections and microassembly, but also included papers on the education issues required to prepare students to work in these areas. In addition to new technical developments, several papers presented overviews predicting the future directions of these technologies. The basic issue is that electronic systems will continue to be miniaturized and at the same time performance must continue to improve. Various industry roadmaps were discussed as well as new smaller packaging and interconnection concepts. The newest chip packages are often based on the selection of an appropriate interconnection method. An example is the chip-scale package, which has horizontal (x-y) dimensions,;; 20% larger than the actual silicon chip itself. The chip is often flip-chip connected to a micro ball-grid-array, but direct chip attach was described also. Several papers described advances in the manufacture of such packages.

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The Workshop is devoted to the technical aspects of advanced interconnections and microassembly and also includes papers on the education issues needed to prepare students for work in these areas. The future direction that such technologies may take is also dealt with. br/ The basic issue is that the miniaturisation of electronic systems continues, and performance must continue to improve. The newest packages are often based on the selection of an appropriate interconnection method. Advances in chip-scale, chip-flip, and direct chip attachments are described. Although wire bonding currently dominates the market, the consensus is that flip chip interconnection will rapidly increase its market share. Tape automated bonding is also discussed, primarily for special applications. Solder metallurgy and flip chip production technology receive attention in several papers. Solderability, reliability and fatigue of the joints are modelled, and mechanical stresses resulting from temperature cycling are reported. br/ Multichip module and thick-film hybrid substrate interconnections are reported in several papers. These include thick and thin film metals, as well as low temperature polymer inks. Several papers describe diffusion and other metallurgical interactions in thick film surfaces.

Inhalt
Session 1. Packaging and Interconnection Trends - Present and Future.- 1.1 The Packaging and Interconnection Trends in the Nordic Microelectronics Industry.- 1.2 IC Packaging for Miniaturised Consumer Electronics.- 1.3 The Move towards Further Miniaturisation.- 1.4 Plastic Packaging is Highly Reliable.- 1.5 Thermal Simulation and Characterization of Single Chip Packages.- 1.6 Current Trends and Future Issues in Solderability.- Session 2. Solder and Flip Chip Interconnections and Assembly.- 2.1 The At-Temperature Mechanical Properties of Lead-Tin-Based Alloys.- 2.2 Flip Chip Technology: Is It Time for Mass Production?.- 2.3 Flip-Chip - The Ultimate Solution Comparing Flip-Chip and Chip Scale Packaging (Abstract only).- 2.4 Solder and Solderless Flip Chip Assembly on a MCM-D in a BGA Package (Abstract only).- 2.5 Solder Bumping for Flip Chip Interconnections.- 2.6 Reliability of Solder Joint Interconnections in Thermally Matched Assemblies.- 2.7 Mechanical Stress in Microelectronic Interconnects.- Session 3. Single Chip Interconnection and Qualification: Wire Bonding and TAB.- 3.1 Low Cost Interconnection Technology for Fast Prototyping of Multichip Modules.- 3.2 Opto-Electronic Multi-Chip Modules (OE-MCMs): Current R&D and Applications to Microelectronic Interconnections.- 3.3 On Thin Film MCM-D Interconnects.- Session 4. Multichip Module Interconnections and Assembly I.- 4.1 VLSI Interconnection by Bumpless Tab.- 4.2 Critical Issues in Wire-Bonded Chip Interconnections to the Year 2001.- 4.3 Bonding of Al Wires to Copper Contacts on PCBs and Alumina Substrates - A Comparative Study.- 4.4 Microwelding of Leads to the the Film Structures Working at Elevated Temperatures.- Session 5. Discussion with the Dean and Vice Chancellor of the Czech Technical University and Peoplefrom the Czech and the Slovak ISHM Chapters.- 5.1 New Trends in the Integration and Education in Microsystems Technology (Abstract only).- Session 6. Multichip Module Interconnections and Assembly II.- 6.1 MCM Implementation of a 2.5 Gb/s ATM Switch.- 6.2 Processing and Performance of High Dielectric Permeability Thin Anodised Films in Multilayer Structures for MCM(D) High Speed Digital Applications.- 6.3 Optical Interconnection Elements Investigation in Chalcogenide Glass Layers for Integrated Optics.- Session 7. Thick Film Interconnections and Metallurgical Interactions I.- 7.1 Material Composition Changes during High Temperature Annealing and Electrochemical Migration Reliability.- 7.2 Nonlinearity between Interconnection and Resistive Layer.- Session 8. Thick Film Interconnections and Metallurgical Interactions.- 8.1 Education in Hybrid Microelectronics at the Technical University of Brno.- 8.2 Thick Film Interconnections for Sensor Applications.- 8.3 PTF (Polymer Thick Film) Interconnections in Term of Long Time Reliability.- 8.4 The Usage of Polymer Inks in Interconnection Technology.- 8.5 Production of Metallic Patterns with the Help of Highresolution Inorganic Resists.