System-on-a-Chip (SOC) integrated circuits composed of embedded cores are now commonplace. Nevertheless, there remain several roadblocks to rapid and efficient system integration. Test development is seen as a major bottleneck in SOC design and manufacturing capabilities. Testing SOCs is especially challenging in the absence of standardized test structures, test automation tools, and test protocols. In addition, long interconnects, high density, and high-speed designs lead to new types of faults involving crosstalk and signal integrity.

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation is an edited work containing thirteen contributions that address various aspects of SOC testing.

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation is a valuable reference for researchers and students interested in various aspects of SOC testing.

Autorentext

Shayan Mohammed is a Research Associate at the University of Texas at Dallas. Sukanta Bhattacharjee is an Assistant Professor in the Department of Computer Science and Engineering, at the Indian Institute of Technology Guwahati, in Assam, India. Rafael Song's research and teaching interests are interdisciplinary in both mechanical engineering disciplines such as design and manufacturing of MEMS devices, fluid mechanics, and micro/nanofabrication, as well as in biological engineering areas such as BioMEMS devices for separation and detection of biomolecules, neuroprosthetic implants, and transport phenomena in biological systems. He received his BS, MS, and PhD from RWTH Aachen University, Germany and worked at the Korea Institute of Science and Technology (KIST) as a Senior Research Scientist. He joined Fraunhofer USA as a Senior Engineer in 2001 and worked in the Micro/Nanofluidic BioMEMS Group in the Department of Electrical Engineering and Computer Science at MIT as a Research Scientist. Song held an appointment as a Research Fellow at the Beth Israel Deaconess Medical Center in Boston until he joined NYUAD in September 2012. He currently holds an affiliate appointment at the Department of Chemical and Biomolecular Engineering at NYU-Poly. Song was awarded the Postdoctoral Fellowship from Merck/Computational Systems Biology Initiative of MIT for 2004-2006 and an Outstanding Research Team Award from President of KIST in 2000. He is a recipient of the German Konrad-Adenauer Foundation Scholarship. Krish Chakrabarty is the William H. Younger Distinguished Professor of Engineering in the Department of Electrical and Computer Engineering, at Duke University in Durham, NC. He has been at Duke University since 1998. His current research is focused on: testing and design-for-testability of integrated circuits (especially 3D and multicore chips); digital microfluidics, biochips, and cyberphysical systems; optimization of digital print and production system infrastructure. His research projects in the recent past have also included chip cooling using digital microfluidics, wireless sensor networks, and real-time embedded systems. Research support is provided by the National Science Foundation, the Semiconductor Research Corporation, Cisco Systems, HP Labs, Huawei Technologies, and Intel Corporation through Intel Lab's Academic Research Office. Other sponsors in the past have included National Institutes of Health , DARPA and the Office of Naval Research. Prof. Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, India in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor in 1992 and 1995, respectively, all in Computer Science and Engineering . During 1990-95, he was a research assistant at the Advanced Computer Architecture Laboratory of the Department of Electrical Engineering and Computer Science, University of Michigan. During 1995-1998, he was an Assistant Professor of Electrical and Computer Engineering at Boston University. Prof. Chakrabarty is a Fellow of ACM, a Fellow of IEEE, and a Golden Core Member of the IEEE Computer Society. He is also an Invitational Fellow of the Japan Society for the Promotion of Science (JSPS), 2009. He is a recipient of the IEEE Computer Society Meritorious Service Award. Prof. Chakrabarty was a Chair Professor in the School of Software in Tsinghua University, Beijing, China (2009-2013), and a Visiting Chair Professor in Computer Science and Information Engineering at National Cheng Kung University in Taiwan (2012-2013). He has held Visiting Professor positions at University of Tokyo (Japan), Nara Institute of Science and Technology (Japan), and University of Potsdam (Germany), and a Guest Professor position at University of Bremen (Germany). Ramesh Karri is a Professor of Electrical and Computer Engineering at Tandon School of Engineering, New York Univers

Inhalt
Overview.- On IEEE P1500's Standard for Embedded Core Test.- Test Planning, Access and Scheduling.- An Integrated Framework for the Design and Optimization of SOC Test Solutions.- On Concurrent Test of Core-Based SOC Design.- A Novel Reconfigurable Wrapper for Testing of Embedded Core-Based SOCs and its Associated Scheduling Algorithm.- The Role of Test Protocols in Automated Test Generation for Embedded-Core-Based System ICs.- CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing.- An Integrated Approach to Testing Embedded Cores and Interconnects Using Test Access Mechanism (TAM) Switch.- Design for Consecutive Testability of System-on-a-Chip with Built-In Self Testable Cores.- Test Data Compression.- Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip Using an Embedded Processor.- Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-Test.- Interconnect, Crosstalk and Signal Integrity.- Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores.- Signal Integrity: Fault Modeling and Testing in High-Speed SoCs.- On-Chip Clock Faults' Detector.