VLSI Design Methodologies for Digital Signal Processing Architectures

Designing VLSI systems represents a challenging task. It is a transfonnation among different specifications corresponding to different levels of design: abstraction, behavioral, stntctural and physical. The behavioral level describes the functionality of the design. It consists of two components; static and dynamic. The static component describes operations, whereas the dynamic component describes sequencing and timing. The structural level contains infonnation about components, control and connectivity. The physical level describes the constraints that should be imposed on the floor plan, the placement of components, and the geometry of the design. Constraints of area, speed and power are also applied at this level. To implement such multilevel transfonnation, a design methodology should be devised, taking into consideration the constraints, limitations and properties of each level. The mapping process between any of these domains is non-isomorphic. A single behavioral component may be transfonned into more than one structural component. Design methodologies are the most recent evolution in the design automation era, which started off with the introduction and subsequent usage of module generation especially for regular structures such as PLA's and memories. A design methodology should offer an integrated design system rather than a set of separate unrelated routines and tools. A general outline of a desired integrated design system is as follows: Decide on a certain unified framework for all design levels. Derive a design method based on this framework. * Create a design environment to implement this design method.

Inhalt

Foreword. Preface. 1. Sphinx: a High Level Synthesis System for DSP ASIC; N. Ramakrishna, M.A. Bayoumi. 2. Synthesizing Optimal Application-Specific DSP Architectures; C.H. Gebotys. 3. Synthesis of Multiple Bus Architectures for DSP Applications; B.S. Haroun, M.I. Elmasry. 4. Exploring the Algorithmic Design Space using High Level Synthesis; M. Potknonjak, J. Rabaey. 5. The MARS High-Level DSP Synthesis System; C.-Y. Wang, K.K. Parhi. 6. High Performance Architecture Synthesis System; P. Duncan, S. Swamy, S. Sprouse, D. Potasz, R. Jain. 7. Modeling Data Flow and Control Flow for DSP System Synthesis; M.F.X.B. Swaaij, F.H.M. Franssen, F.V.M. Catthoor, H.J. DeMan. 8. Automatic Synthesis of Vision Automata; B. Zavidovique, C. Fortunel, G. Quenot, A. Safir, J. Serot, F. Verdier. 9. Architectures and Building Blocks for Data Stream DSP Processors; G.A. Jullien. 10. A General Purposer Xputer Architecture derived from DSP and Image Processing; A. Ast, R.W. Hartenstein, H. Reinig, K. Schmidt, M. Weber. Index.