Microelectronic Interconnections and Assembly

MICROELECTRONIC INTERCONNECTIONS AND MICROASSEMBL Y WORKSHOP 18-21 May 1996, Prague, Czech Republic Conference Organizers: George Harman, NIST (USA) and Pavel Mach (Czech Republic) Summary of the Technical Program Thirty two presentations were given in eight technical sessions at the Workshop. A list of these sessions and their chairpersons is attached below. The Workshop was devoted to the technical aspects of advanced interconnections and microassembly, but also included papers on the education issues required to prepare students to work in these areas. In addition to new technical developments, several papers presented overviews predicting the future directions of these technologies. The basic issue is that electronic systems will continue to be miniaturized and at the same time performance must continue to improve. Various industry roadmaps were discussed as well as new smaller packaging and interconnection concepts. The newest chip packages are often based on the selection of an appropriate interconnection method. An example is the chip-scale package, which has horizontal (x-y) dimensions,;; 20% larger than the actual silicon chip itself. The chip is often flip-chip connected to a micro ball-grid-array, but direct chip attach was described also. Several papers described advances in the manufacture of such packages.

Inhalt

Preface. 1. Packaging and Interconnection Trends - Present and Future. 2. Solder and Flip Chip Interconnections and Assembly. 3. Single Chip Interconnection and Qualification: Wire Bonding and TAB. 4. Multichip Module Interconnections and Assembly I. 5. Discussion with the Dean and Vice Chancellor of the Czech Technical University and People from the Czech and the Slovak ISHM Chapters. 6. Multichip Module Interconnections and Assembly II. 7. Thick Film Interconnections and Metallurgical Interactions I. 8. Thick Film Interconnections and Metallurgical Interactions II. Subject Index.