Instruction-Level Parallelism

Instruction-Level Parallelism presents a collection of papers that attempts to capture the most significant work that took place during the 1980s in the area of instruction-level (ILP) parallel processing. The papers in this book discuss both compiler techniques and actual implementation experience on very long instruction word (VLIW) and superscalar architectures.

Contenu

Guest Editors' Introduction; B.R. Rau, J.A. Fisher. Instruction-Level Parallel Processing: History, Overview, and Perspective; B.R. Rau, J.A. Fisher. The Multiflow Trace Scheduling Compiler; P.G. Lowney, S.F. Freudenberger, T.J. Karzes, W.D. Lichtenstein, R.P. Nix, J.S. O'Donnell, J.C. Ruttenberg. The Cydra 5 Minisupercomputer: Architecture and Implementation; G.R. Beck, D.W.L. Yen, T.L. Anderson. Compiling for the Cydra 5; J.C. Dehnert, R.A. Towle. The Superblock: an Effective Technique for VLIW and Superscalar Compilation; Wen-mei W. Hwu, S.A. Mahlke, W.Y. Chen, Pohua P. Chang, N.J. Warter, R.A. Bringmann, R.G. Ouelette, R.E. Hank, T. Kiyohara, G.E. Haab, J.G. Holm, D.M. lavery. Instruction-Level Experimental Evaluation of the Multiflow TRACE 14/300 VLIW Computer; M.A. Schuette, J.P. Shen.