This book explores the essential facets of security threats arising from the globalized IC supply chain. Contemporary semiconductor companies navigate a globalized IC supply chain, exposing them to various threats such as Intellectual Property (IP) piracy, reverse engineering, overproduction, and malicious logic insertion. Several obfuscation techniques, including split manufacturing, design camouflaging, and Logic Locking (LL), have been proposed to counter these threats. This book describes a new security method for the silicon industry, the Tunable Design Obfuscation Technique, which uses a reconfigurability feature in the chip to make it harder to understand and protect it from rogue elements.

Offers insight into the threats faced by the globalized IC supply chain and state-of-the-art countermeasures available Provides succinct introductions to key topics, with references as needed for further technical depth Introduces and explains a novel, reconfigurable-based obfuscation method, the Tunable Design Obfuscation Technique

Autorentext

Zain Ul Abideen received his Ph.D. from Tallinn University of Technology (TalTech), Tallinn, Estonia, and his M.S. degree in computer engineering (Master in Integration, Security and Trust in Embedded systems) from Grenoble Institute of Technology, Grenoble, France. He is currently a postdoctoral researcher at Carnegie Mellon University, Pittsburgh, PA, USA. His research primarily focuses on ASIC design, hardware security, PUFs, TRNGs, reliable hardware designs, and post-quantum cryptography.

Samuel Pagliarini received his PhD from Telecom ParisTech, Paris, France, in 2013. He has held research positions with the University of Bristol, Bristol, UK, and Carnegie Mellon University, Pittsburgh, PA, USA. From 2019 to 2023, he led the Centre for Hardware Security at Tallinn University of Technology in Tallinn, Estonia. He is currently a professor at Carnegie Mellon University, Pittsburgh, PA, USA.

Inhalt

Introduction.- Background.- A Security-aware CAD Flow for the Obfuscation Method.- Physical Implementation.- Security Analysis.- Securing the Bitstream of hASIC.