These proceedings of the Seventh TRON Symposium cover all aspects of the TRON Project. The project is advancing towards the development of TRON computers, which will be applied to TRON buildings and the TRON city. This volume presents the latest achievements in the project.

Klappentext

The TRON (The Realtime Operating System Nucleus) Project is a new computer architecture that has been proposed for the creation of a new computer society. In the 1990s, it is expected that the age of one computer per person will come about. The TRON Architecture takes into account how to handle the relations between computers and people, and between computers and computers in that age. The proceedings of the Seventh TRON Symposium presented here cover all aspects of the TRON Project. ITRON (Industrial-TRON) for embedded computer systems, BTRON (Business-TRON) for workstations, CTRON (Central-TRON) for large file and communication servers, and CHIP (TRONVLSI microprocessor architecture) are described.

Inhalt
Key Note Address.- Programmable Interface Design in HFDS.- 1: ITRON.- Considerations of the Performance of a Real-Time OS.- Dynamic Stepwise Task Scheduling Algorithm for a Tightly-Coupled Multiprocessor ITRON.- A Graphical Debugger for HI8.- HI8-3X: A AITRON-Specification Realtime Operating System for H8/300 Series Microcontrollers.- 2: BTRON.- Design Policy of the Operating System Based on the BTRON2 Specification.- A Study on a Hypermedia Editor on BTRON1 Specification Operating System.- 3: CTRON.- CTRON Software Portability Evaluation.- Portability Consideration of i386™-Based Basic OS (OS/CT).- OS Subset Structure Achieving AP Portability.- An Evaluation Method of Kernel Products Based on CTRON.- Development of CTRON Operating System for Communication Processing.- 4: CHIP (1).- Implementation and Evaluation of Oki 32-bit Microprocessor 032.- Design Considerations of On-Chip-Type Floating-Point Units.- The Design Method of High Speed Cache Controller/Memory (CCM) for the GMICRO Family Microprocessors.- The Evaluation of M32/100's Bitmap Instructions Used in the Graphic Primitive.- 5: CHIP (2).- Inline Procedures Boost Performance on TRON Architecture.- A Forth Kernel for Gmicro.- The GMICRO Microprocessor and the AT&T UNIX Operating System.- SRM32: Implementation of Symbolic ROM Monitor on GMICRO F32 Series.- Performance Evaluation of TOXBUS.- Appendix: Additional Contributions.- Realtime OS TR90 Based on Micro-ITRON Specification.- Communication Terminal for Heterogeneous Network Based on BTRON HMI.- Pitfalls on the Road to Portability.- Realization of the Micro-CTRON Kernel under pSOS +.- List of Contributors.- Index of Keywords.