This book describes computational intelligence-based tools for robust design of analog circuits. It starts with global variation-aware sizing and knowledge extraction and progressively extends to variation-aware topology design.

This book describes new tools for front end analog designers, starting with global variation-aware sizing, and extending to novel variation-aware topology design. The tools aid design through automation, but more importantly, they also aid designer insight through automation. We now describe four design tasks, each more general than the previous, and how this book contributes design aids and insight aids to each. The ?rst designer task targeted is global robust sizing. This task is supported by a design tool that does automated, globally reliable, variation-aware s- ing (SANGRIA),and an insight-aiding tool that extracts designer-interpretable whitebox models that relate sizings to circuit performance (CAFFEINE). SANGRIA searches on several levels of problem dif?culty simultaneously, from lower cheap-to-evaluate exploration layers to higher full-evaluation exploitation layers (structural homotopy). SANGRIAmakes maximal use of circuit simulations by performing scalable data mining on simulation results to choose new candidate designs. CAFFEINE accomplishes its task by tre- ing function induction as a tree-search problem. It constrains its tree search space via a canonical-functional-form grammar, and searches the space with grammatically constrained genetic programming. The second designer task is topology selection/topology design. Topology selection tools must consider a broad variety of topologies such that an app- priate topology is selected, must easily adapt to new semiconductor process nodes, and readily incorporate new topologies. Topology design tools must allow designers to creatively explore new topology ideas as rapidly as possible.

A roadmap for analog CAD and its implementation algorithm-by-algorithm, presented by notable figures in analog CAD and analog design field who have experience in both the academia and industry A compelling demonstration of how to overcome a key problem in computational intelligence (genetic programming): trustworthy synthesis of complex structures A renewed emphasis for analog CAD tools to give insight to analog designers, with many creative examples of new insights provided Each of the tools described show the first-ever approach to solving their respective problem in a fashion that is industrially palatable. Specifically: SANGRIA is the first approach that simultaneously does global and variation-aware analog sizing. CAFFEINE is the first approach for template-free symbolic modeling. MOJITO is the first approach that does trustworthy analog topology synthesis without the need for unreasonable user inputs, and MOJITO-R is the first approach which does it with variation-awareness. The specs-to-topology decision trees are the first which are automatically-constructed. The nonlinear sensitivity analysis is the first-ever approach which includes both structural and sizing parameters. MOJITO-N and ISCLEs are the first approaches to novel topology design which do not have issues with designer trust

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Trent McConaghy is co-founder and Chief Scientific Officer of Solido Design Automation Inc. He was a co-founder and Chief Scientist of Analog Design Automation Inc., which was acquired by Synopsys Inc. in 2004. Prior to that, he did research for the Canadian Department of National Defense. He received his PhD degree in Electrical Engineering from the Katholieke Universiteit Leuven, Belgium, in 2008. He received a Bachelor's in Engineering (with great distinction), and a Bachelor's in Computer Science (with great distinction), both from the University of Saskatchewan, Canada, in 1999. He has about 40 peer-reviewed technical papers and patents granted / pending. He has given invited talks / tutorials at many labs, universities, and conferences such as JPL, MIT, ICCAD, and DAC. He is regularly a technical program committee member and reviewer in both the CAD and intelligent systems fields, such as IEEE Trans CAD, ACM TODAES, Electronics Letters, to IEEE Trans Evolutionary Computation, the Journal of Genetic Programming and Evolvable Machines, GPTP, GECCO, ICES, etc. His research interest is in statistical machine learning and intelligent systems, with transistor-level CAD applications such as variation-aware design, analog topology design, automated sizing, knowledge extraction, and symbolic modeling. Michiel Steyaert was born in Aalst, Belgium, in 1959. He received the masters degree in electrical-mechanical engineering and the Ph.D. degree in electronics from the Katholieke Universiteit Leuven (K.U.Leuven), Heverlee, Belgium in 1983 and 1987, respectively. From 1983 to 1986 he obtained an IWNOL fellowship (Belgian National Fundation for Industrial Research) which allowed him to work as a Research Assistant at the Laboratory ESAT at K.U.Leuven. In 1987 he was responsible for several industrial projects in the field of analog micropower circuits at the Laboratory ESAT as an IWONL Project Researcher. In 1988 he was a Visiting Assistant Professor atthe University of California, Los Angeles. In 1989 he was appointed by the National Fund of Scientific Research (Belgium) as Research Associate, in 1992 as a Senior Research Associate and in 1996 as a Research Director at the Laboratory ESAT, K.U.Leuven. Between 1989 and 1996 he was also a part-time Associate Professor. He is now a Full Professor at the K.U.Leuven. His current research interests are in high-performance and high-frequency analog integrated circuits for telecommunication systems and analog signal processing. Prof.Steyaert received the 1990 and 2001 European Solid-State Circuits Conference Best Paper Award. He received the 1991 and the 2000 NFWO Alcatel-Bell-Telephone award for innovative work in integrated circuits for telecommunications. Prof.Steyaert received the 1995 and 1997 IEEE-ISSCC Evening Session Award, the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award and is currently an IEEE-Fellow. Georges Gielen received the MSc and PhD degrees in Electrical Engineering from the Katholieke Universiteit Leuven, Belgium, in 1986 and 1990, respectively. He currently is a Full Professor at the Katholieke Universiteit Leuven. His research interests are in the design of analog and mixed-signal integrated circuits, and especially in analog and mixed-signal CAD tools and design automation (modeling, simulation and symbolic analysis, analog synthesis, analog layout generation, analog and mixed-signal testing). He is coordinator or partner of several (industrial) research projects in this area, including several European projects (EU, MEDEA, ESA). He has authored or coauthored five books and more than 300 papers in edited books, international journals and conference proceedings. He regularly is a member of the Program Committees of international conferences (DAC, ICCAD, ISCAS, DATE, CICC...), and served as General Chair of the DATE conference in 2006 and of the International Conference on Computer-Aided Design in 2007. He serves regularly as member of editorial boards of

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100,000 different possible topologies which are all trustworthy by construction. MOJITO does multi-objective genetic programming-based search across these topologies with SPICE accuracy, to return a set of sized topologies on the optimal performance/yield tradeoff curve. Nonlinear sensitivity analysis, topology decision trees, and analytical tradeoffs. With a data-mining perspective on Pareto-optimal topologies, this book shows how to do global nonlinear sensitivity analysis on topology and sizing variables, automatically extract a specs-to-topology decision tree, and determine analytical expressions of performance tradeoffs. Novel topology design. The MOJITO-N and ISCLEs tools generate novel yet trustworthy topolo…