This book describes the design of fully digital multistandard transmitter front-ends which can directly drive one or more switching power amplifiers, eliminating all other analog components. Describes two chips designed using nanometer CMOS technologies.

Describes the design of multistandard digital transmitters and/or continuous-time digital circuits, including theoretical models and adapted implementations of digital building blocks Uses a top-down approach, moving from the architectural level, via mathematical models and high-level simulations, down to circuit-level implementation aspects, including parasitic capacitances and variability Applies techniques described to the design of two Ghz-range multistandard transmitters Includes supplementary material: sn.pub/extras

Inhalt
Introduction.- Digital Transmitter Architectures: Overview.- High-Level Analysis of Fully Digital PWM Transmitters.- Continuous-time Digital Design Techniques.- A 65-nm CMOS Fully Digital Reconfigurable Transmitter Front-End for Class-E PA based on Baseband PWM.- A 40-nm CMOS Fully Digital Reconfigurable Transmitter with Class-D Pas using Baseband and RF PWM.- Conclusions and Future Work.