This book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks. This work is designed to be a short synthesis of the most critical concepts in on-chip network design. It is a resource for both understanding on-chip network basics and for providing an overview of state of-the-art research in on-chip networks. We believe that an overview that teaches both fundamental concepts and highlights state-of-the-art designs will be of great value to both graduate students and industry engineers. While not an exhaustive text, we hope to illuminate fundamental concepts for the reader as well as identify trends and gaps in on-chip network research. With the rapid advances in this field, we felt it was timely to update and review the state of the art in this second edition. We introduce two new chapters at the end of the book. We have updated the latest research of the past years throughout the book and also expanded our coverage of fundamental concepts to include several research ideas that have now made their way into products and, in our opinion, should be textbook concepts that all on-chip network practitioners should know. For example, these fundamental concepts include message passing, multicast routing, and bubble flow control schemes.

Autorentext

Natalie Enright Jerger is an Associate Professor and the Percy Edward Hart Professor of Electrical and Computer Engineering in the Edward S. Rogers Sr. Department of Electrical and Computer Engineering at the University of Toronto. She completed her Ph.D. at the University of Wisconsin-Madison in 2008. She received her Master of Science degree from the University of Wisconsin-Madison and Bachelor of Science in Computer Engineering from Purdue University in 2004 and 2002, respectively. Her research interests include multi- and many-core architectures, on-chip networks, cache coherence protocols, memory systems, and approximate computing. Her research is supported by NSERC, Intel, CFI, AMD, and Qualcomm. She was awarded an Alfred P. Sloan Research Fellowship in 2015, Borg Early Career Award in 2015, MICRO Hall of Fame in 2015, the Ontario Professional Engineers Young Engineer Medal in 2014, and the Ontario Ministry of Research and Innovation Early Researcher Award in 2012.Tushar Krishna is an Assistant Professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology. He received a Ph.D. in Electrical Engineering and Computer Science from Massachusetts Institute of Technology in 2014. Prior to that he received a M.S.E in Electrical Engineering from Princeton University in 2009, and a B.Tech in Electrical Engineering from the Indian Institute of Technology (IIT) Delhi in 2007. Before joining Georgia Tech in 2015, he worked as a researcher in the VSSAD Group at Intel, Massachusetts. His research interests span computer architecture, on-chip networks, heterogeneous SoCs, deep learning accelerators, and cloud networks.Li-Shiuan Peh is Provost's Chair Professor in the Department of Computer Science of the National University of Singapore, with a courtesy appointment in the Department of Electrical and Computer Engineering since September 2016. Previously, she was Professor of Electrical Engineering and Computer Science at MIT and was on the faculty of MIT since 2009. She was also the Associate Director for Outreach of the Singapore-MIT Alliance of Research & Technology (SMART). Prior to MIT, she was on the faculty of Princeton University from 2002. She graduated with a Ph.D. in Computer Science from Stanford University in 2001, and a B.S. in Computer Science from the National University of Singapore in 1995. Her research focuses on networked computing, in many-core chips as well as mobile wireless systems. She received the IEEE Fellow in 2017, NRF Returning Singaporean Scientist Award in 2016, ACM Distinguished Scientist Award in 2011, MICRO Hall of Fame in 2011, CRA Anita Borg Early Career Award in 2007, Sloan Research Fellowship in 2006, and the NSF CAREER award in 2003.

Inhalt
Preface.- Acknowledgments.- Introduction.- Interface with System Architecture.- Topology.- Routing.- Flow Control.- Router Microarchitecture.- Modeling and Evaluation.- Case Studies.- Conclusions.- References.- Authors' Biographies.