This book details all of most recent techniques in modern circuit placement and analyzes the optimality of these placement techniques. It provides significant amounts of analysis on each technique such as trade-offs between quality-of-results and runtime.

This book will cover the advanced techniques in placement which is known as one of the most important components of physical design flow in VLSI design. Physical design addresses the back-end layout stage of chip design process. As the technology scales down, the importance of interconnect optimization becomes more important than ever, and physical design, particularly the placement process, stands in the center of interconnect optimization.

It will have three unique characteristics compared against other books on design automation or physical design: 1) focusing solely on most recent placement techniques; 2) Comprehensiveness; 3) (Indirect) comparison among techniques and 4) Optimality analysis.

Presents the most up to date placement techniques from both academic and industrial researchers Includes contributed chapters by authors from the leading research groups in the world Includes supplementary material: sn.pub/extras

Inhalt
Benchmarks.- ISPD 2005/2006 Placement Benchmarks.- Locality and Utilization in Placement Suboptimality.- Flat Placement Techniques.- DPlace: Anchor Cell-Based Quadratic Placement with Linear Objective.- Kraftwerk: A Fast and Robust Quadratic Placer Using an Exact Linear Net Model.- Top-Down Partitioning-Based Techniques.- Capo: Congestion-Driven Placement for Standard-cell and RTL Netlists with Incremental Capability.- Congestion Minimization in Modern Placement Circuits.- Multilevel Placement Techniques.- APlace: A High Quality, Large-Scale Analytical Placer.- FastPlace: An Efficient Multilevel Force-Directed Placement Algorithm.- mFAR: Multilevel Fixed-Points Addition-Based VLSI Placement.- mPL6: Enhanced Multilevel Mixed-Size Placement with Congestion Control.- NTUplace3: An Analytical Placer for Large-Scale Mixed-Size Designs.- Conclusion and Challenges.