High-Ratio Voltage Conversion in CMOS for Efficient Mains-Connected Standby

This book describes synergetic innovation opportunities offered by combining the field of power conversion with the field of integrated circuit (IC) design. The authors demonstrate how integrating circuits enables increased operation frequency, which can be exploited in power converters to reduce drastically the size of the discrete passive components. The authors introduce multiple power converter circuits, which are very compact as result of their high level of integration. First, the limits of high-power-density low-voltage monolithic switched-capacitor DC-DC conversion are investigated to enable on-chip power granularization. AC-DC conversion from the mains to a low voltage DC is discussed, enabling an efficient and compact, lower-power auxiliary power supply to take over the power delivery during the standby mode of mains-connected appliances, allowing the main power converter of these devices to be shut down fully.

Discusses high-power-density monolithic switched-capacitor DC-DC conversion in bulk CMOS, including a theoretical analysis of the impact of the most important loss contribution, the bottom-plate parasitic coupling Describes advances on AC-DC conversion in a monolithic single-stage solution, as well as a highly-integrated two-stage approach Includes theoretical analysis and comparison of monolithic switched-capacitor DC-DC converter topologies toward high-ratio voltage conversion

Autorentext

Hans Meyvaert was born in Sint-Truiden, Belgium, in 1985. In 2009 he received the degree of M.S. in Electrical Engineering from the Katholieke Universiteit Leuven, Belgium. The subject of his MS thesis was on the design of a fully-integrated 130nm CMOS high power switched capacitor voltage down converter. He is currently working as a research assistant at the MICAS laboratories of the Katholieke Universiteit Leuven towards a PhD degree in the field of high temperature electronics.

Michiel S.J. Steyaert received the masters degree in electrical-mechanical engineering and the Ph.D. degree in electronics from the KU Leuven, Heverlee, Belgium in 1983 and 1987, respectively.

From 1983 to 1986 he obtained an IWNOL fellowship (Belgian National Foundation for Industrial Research) which allowed him to work as a Research Assistant at the Laboratory ESAT at KULeuven. In 1987 he was responsible for several industrial projects in the field of analog micro powercircuits at the Laboratory ESAT as an IWONL Project Researcher.

In 1988 he was a Visiting Assistant Professor at the University of California, Los Angeles. In 1989 he was appointed by the National Fund of Scientific Research (Belgium) as Research Associate, in 1992 as a Senior Research Associate and in 1996 as a Research Director at the Laboratory ESAT, KULeuven. Between 1989 and 1996 he was also a part-time Associate Professor. He is now a Full Professor at the KULeuven. He was the Chair of the Electrical Engineering Department from 2005 until 2012. He is now Dean of the Faculty of Engineering. His current research interests are in high-performance and high-frequency analog integrated circuits for telecommunication systems and analog signal processing.

Prof. Steyaert authored or co-authored over 500 papers in international journals or proceedings and co-authored over 16 books. He received the 1990 and 2001 European Solid-State Circuits ConferenceBest Paper Award. He received the 1991 and the 2000 NFWO Alcatel-Bell-Telephone award for innovative work in integrated circuits for telecommunications. Prof.Steyaert received the 1995 and 1997 IEEE-ISSCC Evening Session Award, the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award and is an IEEE-Fellow since 2003. He received, and is the only European researcher who received both, in 2003 the 50th anniversary top ISSCC contributors award and in 2013 the 60th anniversary top ISSCC contributors award for his strong and sustained contributions.

Inhalt

Introduction.-Switched-capacitor DC-DC in bulk CMOS for on-chip power granularization.- Toward monolithic integration of mains interfaces.- A single-stage monolithic mains interface in 0.35 m CMOS.- Two-stage approach for compact and efficient low power from the mains.- An 11/1 switched-capacitor DC-DC converter for low power from the mains.- Monolithic SC DC-DC towards even higher voltage conversion ratios.- Conclusions and future work.