This book offers a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), covering time-to-digital converters, noise shaping and more. Includes advice on analysis and simulation techniques, and reusable Matlab code.

Discusses in detail a wide range of all-digital phase-locked loops architectures Presents a unified framework in which to model time-to-digital converters for ADPLLs Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs Describes an efficient approach to model ADPLLS Includes Simulink and Matlab code to reproduce the examples in the book Includes supplementary material: sn.pub/extras

Inhalt
Introduction.- Phase Digitization in All-Digital PLLs.- A Unifying Framework for TDC Architectures.- Analytical Predictions of Phase Noise in ADPLLs.- Advantages of Noise Shaping and Dither.- Efficient Modeling and Simulation of Accumulator-Based ADPLLs.- Modelling and Estimating Phase Noise with Matlab.