Exploitation of Fine-Grain Parallelism

Many parallel computer architectures are especially suited for particular classes of applications. However, there are only a few parallel architectures equally well suited for standard programs. Much effort is invested into research in compiler techniques to make programming parallel machines easier.
This book presents methods for automatic parallelization, so that programs need not to be tailored for specific architectures; here the focus is on fine-grain parallelism, offered by most new microprocessor architectures. The book addresses compiler writers, computer architects, and students by demonstrating the manifold complex relationships between architecture and compiler technology.

Autorentext
Dr. Günter Böckle received a MSc degree in Mathematics from the Technical University Stuttgart in 1973 and a PhD (Dr. rer. nat.) in 1976. He joined Siemens 1977 and has since worked in several departments. His major working areas include modeling, simulation, system assessment and performance validation, processor and bus architecture development, and operating system development. He worked in the USA in a joint product development with a major microprocessor manufacturer. Specializing in parallel systems, he focused on instruction-level parallelism. Since several years he is working in the field of systems engineering, currently with emphasis on requirements engineering. Since 1999 the focus shifted to system family engineering.

Inhalt
Kinds of parallelism.- Architectures for fine-grain parallelism.- VLIW machines.- Constraints on VLIW architectures.- Architectural support for exploitation of fine-grain parallelism.- Constraints for instruction scheduling.- Instruction-scheduling methods.- Developing instruction-scheduling methods.- Tools for instruction scheduling.- The machine model.- The horizontal instruction-scheduler.- Resource management.- Exceptions.- Vertical instruction-scheduling.- Conclusion.