This book describes the various tradeoffs systems designers face when designing embedded memory. It uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.

Provides a comprehensive overview of embedded memory design and associated challenges and choices Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design Includes detailed discussion of memory hierarchy and its impact on energy and performance Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis Includes supplementary material: sn.pub/extras

Autorentext

Nourhan Elsayed received her PhD Degree in Electrical and Computer Engineering in 2020, Khalifa University. She received her BSc. in Electrical and Electronics Engineering in 2014 from Khalifa University, Abu Dhabi, UAE. She then received her MSc. in Electrical Engineering from The Petroleum Institute, Abu Dhabi, UAE in 2016. Nourhan's research work is in RF circuit design, specifically high efficiency transmitter design for 5G applications. She has been working on multiple mm-wave designs in 22nm FDSOI including switching amplifiers and efficiency enhancement techniques. Hani Saleh (SM'16) is an assistant professor of electronic engineering at Khalifa University since Jan, 2012. He is an active member in KSRC (Khalifa University Research Center) where he leads a project for the development of wearable blood glucose monitor SOC and a mobile surveillance SOC and safe exercise monitoring device. Hani published 81 articles in peer-reviewed journals and conferences, he has 11 issued US patents and 3 pending patent applications. Hani has a total of 19 years of industrial experience in ASIC chip design, microprocessor design, DSP core design, graphics core design and embedded system design. His experience spans DSP core design, microprocessor peripherals design, microprocessors and graphics core deign. Prior to joining Khalifa University he worked as a Senior Chip Designer (Technical Lead) at Apple incorporation; where he worked on the design and implementation of Apple next generation graphics cores for its mobile products (iPad, iPhone, ...etc.), prior to joining Apple, he worked for several leading semiconductor companies including Intel (ATOM mobile microprocessor design), AMD (Bobcat mobile microprocessor design), Qualcomm (QDSP DSP core design for mobile SOC's), Synopsys (a key member of Synopsys turnkey design group where he taped out many ASICs and designed the I2C DW IP included in Synopys DesignWare library), Fujitsu (SPARC compatible high performance microprocessor design) and Motorola Australia (M210 low power microprocessor synthesizable core design). Baker Mohammad (M'04-SM'13) received the B.S. degree from the University of New Mexico, Albuquerque, NM, USA, the M.S. degree from Arizona State University, Tempe, AZ, USA, and the Ph.D. degree from the University of Texas at Austin, Austin, TX, USA, in 2008, all in electricaland computer engineering. He was a Senior Staff Engineer and the Manager with Qualcomm, Austin, where he was involved in designing high performance and low power DSP processor used for communication and multimedia application. He was involved in a wide range of microprocessors design with Intel Corporation, Santa Clara, CA, USA, from high performance, server chips >100 W (IA-64), to mobile embedded processor low power sub-1 W (xscale). He has over 16 years of industrial experience in microprocessor design with an emphasis on memory, low power circuit, and physical design. He is currently an Assistant Professor of Electronic Engineering with the Khalifa University of Science, Technology and Research, Abu Dhabi, United Arab Emirates, and a Consultant with Qualcomm Inc., San Diego, CA, USA. In addition, he is involved in microwatt range computing platform for WSN focusing on energy harvesting and power management, including efficient dc/dc and ac/dc converters. He holds ten issued U.S. patents and has several pending patent applications. He has authored one book entitled Embedded Memory Design for Multi-Core and SoC and co-authored several publications in digital system design, memory design and testing, energy harvesting, power management, and power conversion, in addition to emer

Inhalt
Introduction.- Cache Architecture and Main Blocks.- Embedded Memory Hierarchy.- SRAM Memory Operation and Yield.- Low Power and High Yield SRAM Memory.- Leakage Reduction.- Embedded Memory Verification.- Embedded Memory Design Validation and Design For Test.- Emerging Memory Technology Opportunities and Challenges.