This book proposes innovative circuit, architecture, and system solutions in deep-scaled CMOS and FinFET technologies, which address the challenges in maximizing the accuracy*speed/power of multi-GHz sample rate and bandwidth Analog-to-Digital Converters (ADC)s. A new holistic approach is introduced that first identifies the major error sources of a converter' building blocks, and quantitatively analyzes their impact on the overall performance, establishing the fundamental circuit-imposed accuracy speed power limits. The analysis extends to the architecture level, by introducing a mathematical framework to estimate and compare the accuracy speed power limits of several ADC architectures and variants. To gain system-level insight, time-interleaving is covered in detail, and a framework is also introduced to compare key metrics of interleaver architectures quantitatively. The impact of technology is also considered by adding process effects from several deep-scaled CMOS technologies.

The validity of the introduced analytical approach and the feasibility of the proposed concepts are demonstrated by four silicon prototype Integrated Circuits (IC)s, realized in ultra-deep-scaled CMOS and FinFET technologies.

• Introduces a new, holistic approach for the analysis and design of high-performance ADCs in deep-scaled CMOS technologies, from theoretical concepts to silicon bring-up and verification;
• Describes novel methods and techniques to push the accuracy speed power boundaries of multi-GHz ADCs, analyzing core and peripheral circuits' trade-offs across the entire ADC chain;
• Supports the introduced analysis and design concepts by four state-of-the-art silicon prototype ICs, implemented in 28nm bulk CMOS and 16nm FinFET technologies;

• Provides a useful reference and a valuable tool for beginners as well as experienced ADC design engineers.

  Introduces a holistic approach for the analysis and design of high-performance ADCs in deep-scaled CMOS technologies Proposes novel techniques across the entire chain to push the accuracyspeedpower envelope of multi-GHz ADCs Provides a useful reference and a valuable tool for beginners as well as experienced ADC design engineers

  Autorentext
  Athanasios T. Ramkaj received the M.Sc. degree (cum laude) in electrical engineering (microelectronics) from TU Delft, Delft, The Netherlands, and the Ph.D. degree (summa cum laude) in electrical engineering from KU Leuven, Leuven, Belgium, in 2014 and 2021, respectively. Since June 2021, he has been with the Murmann Mixed-Signal Group, Stanford University, Stanford, CA USA, as a postdoctoral research fellow. In parallel, he is also a visiting researcher at Kilby Labs, Texas Instruments, Santa Clara, CA USA, investigating multi-GHz ultra-low jitter A/D solutions. From 2013 to 2014, he was an AMS research/design intern in the Central Research & Development Department of NXP Semiconductors, Eindhoven, The Netherlands, where he worked on GHz-range A/D converters for communication systems. In 2019, he was an AMS research/design intern with the High-Speed Data Converters group of Analog Devices Inc., Wilmington, MA USA, investigating highly integrated solutionsfor bandwidth extension of next generation RF A/D converters. His main research interests include high-speed/bandwidth high-resolution RF sampling A/D converters, high-speed analog/mixed-signal circuits for wireline and wireless systems, ultra-wideband receiver front ends, and ultra-low jitter clocking. Dr. Ramkaj is the recipient of the 2021 Analog Devices Outstanding Student Designer Award, the 2019-2020 IEEE Solid-State Circuits Society Predoctoral Achievement Award, and the 2015 IEEE PRIME Golden Leaf Best Student Paper Award. He also serves as a reviewer for the IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION SYSTEMS, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, and IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS. Marcel J. M. Pelgrom received his M.Sc. and Ph.D. degrees from Twente University, Enschede, The Netherlands. In 1979 he joined Philips Research Laboratories, wherehis research has covered topics as Charge Coupled Devices, MOS matching properties, analog-to-digital conversion, digital image correlation, and various analog building block techniques. He has headed several project teams and was as a team leader for high-speed analog-to-digital conversion products responsible for many Integrated Circuits. His IEEE JOURNAL OF SOLID-STATE CIRCUITS paper on MOS transistor mismatch is the most cited paper of this Journal. From 1996 till 2003 he was a department head for mixed-signal electronics research. In 2003 and 2014 he spent a sabbatical in Stanford University, Stanford, CA, USA, where he was appointed a consulting professor. Till 2013 he was a member of the technical staff of NXP Semiconductors, Eindhoven, The Netherlands. Next to the various activities concerning industry-academic relations, he was involved as a research fellow in research on substrate noise, variability and advanced conversion techniques. Presently, he is an independent consultant. Dr. Pelgrom is an honorary professor at the KU Leuven, Leuven, Belgium, and the 2017 recipient of the prestigious IEEE Gustav R. Kirchhoff award. He served twice as an IEEE Distinguished Lecturer, as associate editor for the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, and has written over 40 publications, three books, seven book chapters, and holds 37 US patents. He is currently lecturing at Twente University, Enschede, The Netherlands, Delft University, Delft, The Netherlands, and for MEAD/EPFL, Lausanne, Switzerland. Michiel S. J. Steyaert received the M.Sc. degree in electrical and mechanical engineering and the Ph.D. degree in electronics from KU Leuven, Leuven, Belgium, in 1983 and 1987, respectively. From 1983 to 1986, he received the IWNOL Fellowship from the Belgian National Foundation for Industrial Research, which allowed him to work as a Research Assistant with the Laboratory ESAT, KU Leuven. In 1987, he was responsible for several industrial projects in the field of

  Inhalt

Introduction.- Analog-to-Digital Conversion Fundamentals.- Architectural Considerations for High-Efficiency GHz-Range ADCs.- Ultrahigh-Speed High-Sensitivity Dynamic Comparator.- High-Speed Wide-Bandwidth Single-Channel SAR ADC.- High-Resolution Wide-Bandwidth Time-Interleaved RF ADC.- Ultra-Wideband Direct RF Receiver Analog Front End.- Conclusions, Contributions, and Future Work.