Logic Synthesis for VLSI-Based Combined Finite State Machines

The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs. The book contains some original synthesis and optimization methods targeting hardware reduction in VLSI-based CFSM circuits. These methods take into account the peculiarities of both a CFSM model and a VLSI chip in use. The optimization is achieved due to combining classical optimization methods with new methods proposed in this book. These new methods are a mixed encoding of collections of microoperations and a twofold state assignment in CFSMs. All proposed methods target reducing the numbers of arguments in systems of Boolean functions representing CFSM circuits. Also, we propose to use classes of pseudoequivalent states of Moore FSMs to reduce the number of product terms in these systems.The book includes a lot of examples which contributes to a better understanding of the features of the synthesis methods under consideration.
This is the first book entirely devoted to the problems associated with synthesis and optimization of VLSI-based CFSMs. We hope that the book will be interesting and useful for students and PhD students in the area of Computer Science, as well as for designers of various digital systems. We think that proposed CFSM models enlarge the class of models applied for implementation of control units with modern VLSI chips.

Presents methods for the hardware optimization of circuits of combined finite state machines (CFSMs) Proposes synthesis methods targeting three following types of VLSI chips: ASICs, CPLDs and FPGAs Develops some synthesis methods which allow reducing the hardware amount for CFSM circuits

Inhalt
Control algorithms and finite state machines.- VLSI-based logic synthesis.- ASIC-based synthesis of CFSMs.- Optimization of ASIC-based CFSMs.- Homogenous CPLD-based synthesis of CFSMs.