This book presents the research challenges that are due to the introduction of the 3rd dimension in chips for researchers and covers the whole architectural design approach for 3D-SoCs. Nowadays the 3D-Integration technologies, 3D-Design techniques, and 3D-Architectures are emerging as interesting, truly hot, broad topics. The present book gathers the recent advances in the whole domain by renowned experts in the field to build a comprehensive and consistent book around the hot topics of three-dimensional architectures and micro-architectures. This book includes contributions from high level international teams working in this field.

Provides a detailed background on the state of error control methods for on-chip interconnects, including Error Control Coding, Double Sampling, and On-Line Testing Describes the use of more complex concatenated codes such as Hamming Product Codes with Type-II HARQ, while emphasizing integration techniques for on-chip interconnect links Presents techniques for managing intermittent and permanent errors using a non-interrupting in-line test method with spare wire replacement Includes supplementary material: sn.pub/extras

Klappentext
Back Cover Copy SERIES: Integrated Circuits and Systems 3D-Integration for NoC-based SoC Architectures by: (Editors) Abbas Sheibanyrad Frédéric Petrot Axel Janstch This book investigates on the promises, challenges, and solutions for the 3D Integration (vertically stacking) of embedded systems connected via a network on a chip. It covers the entire architectural design approach for 3D-SoCs. 3D-Integration technologies, 3D-Design techniques, and 3D-Architectures have emerged as topics critical for current R&D leading to a broad range of products. This book presents a comprehensive, system-level overview of three-dimensional architectures and micro-architectures. •Presents a comprehensive, system-level overview of three-dimensional architectures and micro-architectures; •Covers the entire architectural design approach for 3D-SoCs; •Includes state-of-the-art treatment of 3D-Integration technologies, 3D-Design techniques, and 3D-Architectures.

Inhalt
Three-Dimensional Integration of Integrated Circuits - an Introduction.- The Promises and Limitation of 3-D Integration.- Testing 3D Stacked ICs Containing Through-Silicon Vias.- Design and Computer Aided Design of 3DIC.- Physical Analysis of NoC Topologies for 3-D Integrated Systems.- Three-Dimensional Networks-on-Chip: Performance Evaluation.- Asynchronous 3D-NoCs.- Design of Application-Specific 3D Networks-on-Chip Architectures.- 3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks.- 3-D NoC on Inductive Wireless Interconnect.- Influence of Stacked 3D Memory/Cache architectures on GPUs.