Written by leading international experts, this book summarizes the advances in sample preparation, design and construction of dangling bond atomic scale wires and logic gate circuits at the surface of a passivated semi-conductor. Individual chapters cover different aspects of the sample fabrication from research and development point of view, present design and construction as well as microscopic and spectroscopic characteristics of single dangling atomic wires and logic gates, and discuss the tools for design of large atomic scale circuit on a surface.This edited volume includes selected contributions from the "International Workshop on Atomic Wires" held in Krakow in September 2014 completed and updated with most current results up to mid-2016, and offers for the first time an overview of up-to-date knowledge in the burgeoning field of atomic scale circuits. The book will appeal to researchers and scholars interested in nanoscience and its various sub-fields including, in particular, molecular electronics, atomic scale electronics and nanoelectronics.

Autorentext

Marek Kolmer obtained his PhD degree in experimental physics in 2014 from the Jagiellonian University in Krakow (Poland) under the supervision of Prof. Marek Szymoski. After six months attachment to the NanoSciences Group at CEMES (CNRS) in Toulouse he came back to Krakow, where he is now a researcher at the Faculty of Physics, Astronomy and Applied Computer Science, Jagiellonian University. His research interests are related to fabrication and experimental verification of functional properties of molecular and atomic structures on semiconducting surfaces, i.e. hydrogenated surfaces of silicon and germanium. Despite an early stage of his scientific career, he is the author of more than 20 publications. His current scientific achievements were also rewarded by a few national awards including ETIUDA grant from the Polish National Science Center (2013) and START scholarships from the Foundation of Polish Science (2014, 2015).

Christian Joachim is Director of Research at the Nanoscience group in the Pico-Lab CEMES/CNRS and adjunct Professor of Quantum Physics at ISAE Toulouse. He was A*STAR VIP Atom Tech in Singapore (2005-2014) and is the head of the WPI MANA-NIMS satellite in Toulouse since 2008. He coordinated the Integrated European projects "Bottom-up Nanomachines", Pico-Inside and AtMol (2011-2014) whose objective was to prepare the construct of the first ever molecular chip. Author of more than 270 scientific publications (h = 55), he had presented over 360 invited talks on electron transfer through a molecule, STM and Atomic Force Microscopy (AFM) image calculations, tunnel transport through a molecule, single molecule logic gate, atomic scale circuits, nanolithography, atomic scale electronics interconnects and single molecule-machines. His book: Nanosciences, the invisible revolution (Le Seuil (2008), World Scientific (2009)) is giving the history of nanosciences and its political drawbacks to a general public. He was awarded the IBM France Prize (1991), the Feynman Prize (1997), the CNRS Silver Medal in Chemistry (2001), the Feynman Prize (2005) and a Guinness book entry (2011) for the smallest ever functioning nano-gear, 1.2 nm in diameter.

Inhalt
Surface Hydrogenation of the Si(100)-2x1 and electronic properties of silicon dangling bonds on the Si(100):H surfaces.- Nanopackaging of Si(100)H wafer for atomic scale investigations.- Atomic wires on Ge(001):H surface.- Si(100):H and Ge(100):H Dimer Rows Contrast Inversion in Low-Temperature Scanning Tunnelling Microscope Images.- Band engineering of dangling-bond wires on the Si (100)H surface.- Band Engineering of the Si(001):H Surface by Doping with P and B Atoms.- Electronic Properties of a Single Dangling Bond and of Dangling Bond Wires on a Si(001)H Surface.- Quantum Hamiltonian Computing (QHC) Logic Gates.- The Design of a surface atomic scale logic gate with molecular latch inputs.- Molecule Latches in atomic scale surface logic gates constructed on the Si(100)H surface.- Complex atomic scale surface electronic circuit's simulator including the pads and the supporting surface.