This book describes methodologies in the design of VLSI devices, circuits and their applications at nanoscale levels. The book begins with the discussion on the dominant role of power dissipation in highly scaled devices.The 15 Chapters of the book are classified under four sections that cover design, modeling, and simulation of electronic, magnetic and compound semiconductors for their applications in VLSI devices, circuits, and systems. This comprehensive volume eloquently presents the design methodologies for ultra-low power VLSI design, potential post-CMOS devices, and their applications from the architectural and system perspectives. The book shall serve as an invaluable reference book for the graduate students, Ph.D./ M.S./ M.Tech. Scholars, researchers, and practicing engineers working in the frontier areas of nanoscale VLSI design.

Autorentext

Rohit Dhiman received his B.Tech. in Electronics & Communication Engineering from HP

University Shimla, India in 2007. He did his M.Tech. Degree in VLSI Design from National

Institute of Technology (NIT) Hamirpur in 2009. He was awarded Ph.D. Degree from NIT

Hamirpur in 2014. Presently Dr. Rohit Dhiman is working as an Assistant Professor in

Electronics & Communication Engineering Department at NIT Hamirpur and is the author/co-author of Research Publications in International Journals and Conference

proceedings of repute. He has also edited/ authored three books published by the IET and

Springer. He has been awarded with the Young Scientist Award from the Science and

Engineering Research Board, Department of Science & Technology GoI, New Delhi. He is

recipient of the prestigious Young Faculty Research Fellowship of the Ministry of Electronics and Information Technology (MeitY), Govt. of India and has two sponsored research

projects to his credit. His major research interest is in device and circuit modelling for low

power nanoscale IC design.

Rajeevan Chandel received B.E. Degree in E&CE from Thapar Institute of Engineering & Technology (now Thapar University), Patiala, India in 1990. She is a double gold medalist of Himachal Pradesh University, Shimla in Pre-Univ. and Pre-Engg. in 1985 and 1986 respectively. She did her M. Tech. Degree in Integrated Electronics and Circuits, from Indian Institute of Technology (IIT) Delhi in 1997. She was awarded Ph.D. Degree from IIT Roorkee, India in 2005. Dr. Chandel joined Department of E&CE, NIT Hamirpur as Lecturer in 1990, where presently she is working as Professor. Dr. Chandel has been Head of the E&CE Department twice and was formerly Dean (Research & Consultancy) at NIT Hamirpur. She has over 150 research papers in peer reviewed International Journals of repute and Conferences. She has six sponsored projects to her credit from Govt. of India. Currently, she is the Chief Investigator of the prestigious SMDP-C2SD project of MeitY, New Delhi. She has also edited/authored three books of IET and Springer. Her research interests are electronics circuit modelling and low power VLSI design. She is a Fellow of IETE (I) and life member of ISTE (I) and member of IEEE, ISSS and VSI.

Inhalt
Orthogonally Controllable VQO for Low Voltage Applications.- Design Techniques for Low Power Integrated Circuits.- Gallium Nitride Emerging Future Technology for Low Power Nanoscale IC Design.- Power and Area Ecient Architectural Design.