Inhalt

Experiences in Using Cetus for Source-to-Source Transformations.- The LLVM Compiler Framework and Infrastructure Tutorial.- An Overview of the Open Research Compiler.- Trimaran: An Infrastructure for Research in Instruction-Level Parallelism.- Phase-Based Miss Rate Prediction Across Program Inputs.- Speculative Subword Register Allocation in Embedded Processors.- Empirical Performance-Model Driven Data Layout Optimization.- Implementation of Parallel Numerical Algorithms Using Hierarchically Tiled Arrays.- A Geometric Approach for Partitioning N-Dimensional Non-rectangular Iteration Spaces.- JuliusC: A Practical Approach for the Analysis of Divide-and-Conquer Algorithms.- Exploiting Parallelism in Memory Operations for Code Optimization.- An ILP-Based Approach to Locality Optimization.- A Code Isolator: Isolating Code Fragments from Large Programs.- The Use of Traces for Inlining in Java Programs.- A Practical MHP Information Analysis for Concurrent Java Programs.- Efficient Computation of Communicator Variables for Programs with Unstructured Parallelism.- Compiling High-Level Languages for Vector Architectures.- HiLO: High Level Optimization of FFTs.- Applying Loop Optimizations to Object-Oriented Abstractions Through General Classification of Array Semantics.- MSA: Multiphase Specifically Shared Arrays.- Supporting SQL-3 Aggregations on Grid-Based Data Repositories.- Supporting XML Based High-Level Abstractions on HDF5 Datasets: A Case Study in Automatic Data Virtualization.- Performance of OSCAR Multigrain Parallelizing Compiler on SMP Servers.- Experiences with Co-array Fortran on Hardware Shared Memory Platforms.- Experiments with Auto-Parallelizing SPEC2000FP Benchmarks.- An Offline Approach for Whole-Program Paths Analysis Using Suffix Arrays.- Automatic Parallelization Using the Value Evolution Graph.- A New Dependence Test Based on Shape Analysis for Pointer-Based Codes.- Partial Value Number Redundancy Elimination.- Overflow Controlled SIMD Arithmetic.- Branch Strategies to Optimize Decision Trees for Wide-Issue Architectures.- Extending the Applicability of Scalar Replacement to Multiple Induction Variables.- Power-Aware Scheduling for Parallel Security Processors with Analytical Models.