Component variability, mismatch, and various noise effects are major contributors to design limitations in most modern IC processes. Mismatch and Noise in Modern IC Processes examines these related effects and how they affect the building block circuits of modern integrated circuits, from the perspective of a circuit designer. Variability usually refers to a large scale variation that can occur on a wafer to wafer and lot to lot basis, and over long distances on a wafer. This phenomenon is well understood and the effects of variability are included in most integrated circuit design with the use of corner or statistical component models. Mismatch, which is the emphasis of section I of the book, is a local level of variability that leaves the characteristics of adjacent transistors unmatched. This is of particular concern in certain analog and memory systems, but also has an effect on digital logic schemes, where uncertainty is introduced into delay times, which can reduce margins and introduce 'race' conditions. Noise is a dynamic effect that causes a local mismatch or variability that can vary during operation of a circuit, and is considered in section II. Noise can be the result of atomic effects in devices or circuit interactions, and both of these are discussed in terms of analog and digital circuitry. Table of Contents: Part I: Mismatch / Introduction / Variability and Mismatch in Digital Systems / Variability and Mismatch in Analog Systems I / Variability and Mismatch in Analog Systems II / Lifetime-Induced Variability / Mismatch in Nonconventional Processes / Mismatch Correction Circuits / Part II: Noise / Component and Digital Circuit Noise / Noise Effects in Digital Systems / Noise Effects in Analog Systems / Circuit Design to Minimize Noise Effects / Noise Considerations in SOI

Autorentext

Andrew Marshall has more than 25 years of experience in the semiconductor industry in a variety of areas including material characterization, process and device development, mixed signal integrated circuit design, and circuit simulation. Dr. Marshall has 45 issued patents and 60 published papers. He is co-author of the book SOI Design: Analog, Memory and Digital Techniques and is a Fellow of the Institute of Physics and a Senior Member of the IEEE.