CMOS PLLs and VCOs for 4G Wireless is the first book devoted to the subject of CMOS PLL and VCO design for future broadband 4th generation wireless devices. These devices will be handheld-centric, requiring very low power consumption and small footprint. They will be able to work across multiple bands and multiple standards covering WWAN (GSM,WCDMA) ,WLAN(802.11 a/b/g) and WPAN(Bluetooth) with different modulations, channel bandwidths , phase noise requirements ,etc. As such, this book discusses design, modeling and optimization techniques for low power fully integrated broadband PLLs and VCOs in deep submicron CMOS.
First, the PLL and VCO performances are studied in the context of the chosen multi-band multi-standard, radio architecture and the adopted frequency plan. Next a thorough study of the design requirements for broadband PLL/VCO design is conducted together with modeling techniques for noise sources in a PLL and VCO focusing on optimization of integrated phase noise for multi-carrier OFDM 64-QAM type applications. Design examples for multi-standard 802.111a/b/g as well as for GSM/WCDMA are fully described and experimental results from 0.18 micron CMOS test chips have demonstrated the validity of the proposed design and optimization techniques. Equally important the work describes techniques for robust high volume production of RF radios in general and for integrated PLL/VCO design in particular including issues such as supply sensitivity, ground bounce and calibration mechanisms.
CMOS PLLS and VCOs for 4G Wireless will be of interest to graduate students in electrical and computer engineering, design managers and RFIC designers in wireless semiconductor companies.

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Dedication List of Figures List of Tables Preface List of Acronyms 1: INTRODUCTION 1. 4G Wireless Terminals 2. 4G PLL/VCO Design Challenges 3. Objectives 4. Organization of This book 5. Summary 2: OVERVIEW OF VCO/PLL FOR WIRELESS COMMUNICATION 1. Oscillator Overview 2. PLL Frequency Synthesis 3. Phase Noise Specification 4. Summary 3: PLL PHASE NOISE ANALYSIS 1. Phase Noise Definition 2. Oscillator Noise Characteristics 3. PLL Noise Analysis 4. Summary 4: BROADBAND VCOs: SYSTEM DESIGN CONSIDERATIONS 1. Radio Architecture and Frequency Planning Considerations 2. CMOS System Integration 3. Summary 5: BROADBAND VCOs: CIRCUIT DESIGN CONSIDERATIONS 1. Broadband VCO with Subbands 2. Switching Techniques for Broadband Operation 3. Broadband VCO Implementation 4. Resonator Tank Design 5. Summary 6: BROADBAND VCOs: PRACTICAL DESIGN ISSUES 1. PVT Variation Effects on VCO Tuning 2. Tuning Range Calibration (Trimming) 3. External Trimming 4. Auto Calibration (or Self Trimming) 5. Proposed Auto Calibration Technique 6. VCO Pulling In the Integrated Environment 7. Summary 7: 4GHz BROADBAND VCO: A CASE STUDY 1. Design Objectives 2. Circuit Topologies 3. VCO Tuning 4. Characterization and Measurement Results 5. Summary 8: A PLL FOR GSM/WCDMA 1. Frequency Plan and System architecture 2. Dual band VCO Design for Dual Mode Operation 3. Integer-N Architecture 4. Implementation of the Integer-N Architecture 5. Summary 9: PLLs FOR IEEE 802.11 a/b/g WLANs 1. Why Multi-band Tri-mode WLANs? 2. Frequency Plan, Radio Architecture and PLL Specifications 3. Phase Noise Optimization and Trade-offs 4. Loop Filter Design 5. The RF (LOl) Synthesizer Implementation 6. The IF (L02) Synthesizer Implementation 7. Measured Results 8. Summary 10: RF CMOS COMPONENT CHARACTERIZATION 1. Calibration and Measurement Techniques 2. Pad De-embedding 3. Pad De-embedding Considerations for RF CMOS 4. Probe Pad Layout Techniques 5. Measurement Environment Setups 6. RF CMOS Test Chip 7. Measurement Results and Technology Evaluation 8. Summary 11: CONCLUSIONS Appendices A S-parameters to Y-parameters Transformation References Index