Stress and Strain Engineering at Nanoscale in Semiconductor Devices

Auteur

Professor Chinmay K. Maiti, PhD is an Ex-Professor and Ex-Head of Department from Indian Institute of Technology (IIT) Kharagpur, India. He then joined the SOA University, Bhubaneswar in May 2015 as a Professor, where he is now on a Visiting Assignment. He is interested in strain-engineering in nanodevices, flexible electronics, and semiconductor device/process simulation research, and microelectronics education. He has published several monographs in Silicon-Germanium, heterostructure-Silicon, and Technology CAD areas. He has edited the "Selected Works of Professor Herbert Kroemer", World Scientific, Singapore, 2008.

Résumé
Based on 3D process and device simulations with mechanical stress simulations by finite element techniques, this book explains performance assessment of nanoscale devices with strained SiGe and other stressors. It explains the process-induced stress transfer and developments at 7nm technology and below node in the area of strain-engineered devices.

Contenu

Chapter 1. Introduction

Chapter 2. Simulation Environment

Chapter 3. Stress Generation Techniques in CMOS Technology

Chapter 4. Electronic Properties of Engineered Substrates

Chapter 5. Bulk-Si FinFETs

Chapter 6. Strain-Engineered FinFETs at NanoScale

Chapter 7. Technology CAD of III-Nitride Based Devices

Chapter 8. Strain-Engineered SiGe Channel TFT for Flexible Electronics