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Characterization and Design of High Level VHDL I/Q Frequency Downconverter via Special Sampling Scheme

  • Kartonierter Einband
  • 224 Seiten
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This study explores the characterization and implementation of a Special Sampling Scheme (SSS) for In-Phase and Quad-Phase (I/Q) ... Weiterlesen
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Beschreibung

Klappentext

This study explores the characterization and implementation of a Special Sampling Scheme (SSS) for In-Phase and Quad-Phase (I/Q) downconversion utilizing top-level, portable design strategies. The SSS is an under-developed signal sampling methodology that can be used with military and industry receiver systems, specifically, United States Air Force (USAF) video receiver systems. The SSS processes a digital input signal-stream sampled at a specified sampling frequency, and downconverts it into In-Phase (I) and Quad-Phase (Q) output signal-streams. Using the theory and application of the SSS, there are three main objectives that will be accomplished: characterization of the effects of input, output, and filter coefficient parameters on the I/Q imbalances using the SSS; development and verification of abstract, top-level VHDL code of the I/Q SSS for hardware implementation; and finally, development, verification, and analysis of variation between synthesizable pipelined and sequential VHDL implementations of the SSS for Field Programmable Gate Arrays (FPGA) and Application Specific Integrated Circuits (ASIC).

Produktinformationen

Titel: Characterization and Design of High Level VHDL I/Q Frequency Downconverter via Special Sampling Scheme
Autor:
EAN: 9781288285877
ISBN: 1288285876
Format: Kartonierter Einband
Anzahl Seiten: 224
Gewicht: 408g
Größe: H246mm x B189mm x T13mm
Jahr: 2012

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