Computer Design Aids for VLSI Circuits

The Nato Advanced Study Institute on "Computer Design Aids for VLSI Circuits" was held from July 21 to August 1, 1980 at Sogesta, Urbino, Italy. Sixty-three carefully chosen profes sionals were invited to participate in this institute together with 12 lecturers and 7 assistants. The 63 participants were selected from a group of almost 140 applicants. Each had the background to learn effectively the set of computer IC design aids which were presented. Each also had individual expertise in at least one of the topics of the Institute. The Institute was designed to provide hands-on type of experience rather than consisting of solely lecture and discussion. Each morning, detailed presentations were made concerning the critical algorithms that are used in the various types of computer IC design aids. Each afternoon a lengthy period was used to provide the participants with direct access to the computer programs. In addition to using the programs, the individual could, if his expertise was sufficient, make modifications of and extensions to the programs, or establish limitations of these present aids. The interest in this hands-on activity was very high and many participants worked with the programs every free hour. The editors would like to thank the Direction of SOGESTA for the excellent facilities, ~1r. R. Riccioni of the SOGESTA Computer Center and Mr. 11. Vanzi of the University of Genova for enabling all the programs to run smoothly on the set date. P.Antognetti D.O.Pederson Urbino, Summer 1980.

Klappentext

Proceedings of the NATO Advanced Study Institute on Computer Design Aids for VLSI Circuits, Urbino, Italy, July 21-August 1, 1980

Inhalt
Computer Aids in Integrated Circuits Design.- Circuit Simulation.- Mixed-mode Circuit Simulation Techniques and Their Implementation in DIANA.- Timing, Logic and Mixed-mode Simulation for Large MOS Integrated Circuits.- Simulation of Analog Sampled-data MOSLSI Circuits.- Description and Simulation of Complex Digital Systems by Means of the Register Transfer Language RTS Ia.- Functional Simulation.- Design for Testability.- Computer Aids to Testing An Overview.- Layout Automation Based on Placement and Routing Algorithms.- Symbolic Layout Compaction.