All-Digital Frequency Synthesizer in Deep-Submicron CMOS

A new and innovative paradigm for RF frequency synthesis and
wireless transmitter design

Learn the techniques for designing and implementing an
all-digital RF frequency synthesizer. In contrast to traditional RF
techniques, this innovative book sets forth digitally intensive
design techniques that lead the way to the development of low-cost,
low-power, and highly integrated circuits for RF functions in deep
submicron CMOS processes. Furthermore, the authors demonstrate how
the architecture enables readers to integrate an RF front-end with
the digital back-end onto a single silicon die using standard ASIC
design flow.

Taking a bottom-up approach that progressively builds skills and
knowledge, the book begins with an introduction to basic concepts
of frequency synthesis and then guides the reader through an
all-digital RF frequency synthesizer design:

• Chapter 2 presents a digitally controlled oscillator (DCO),
  which is the foundation of a novel architecture, and introduces a
  time-domain model used for analysis and VHDL simulation

• Chapter 3 adds a hierarchical layer of arithmetic abstraction
  to the DCO that makes it easier to operate algorithmically

• Chapter 4 builds a phase correction mechanism around the DCO
  such that the system's frequency drift or wander performance
  matches that of the stable external frequency reference

• Chapter 5 presents an application of the all-digital RF
  synthesizer

• Chapter 6 describes the behavioral modeling and simulation
  methodology used in design

The final chapter presents the implementation of a full
transmitter and experimental results. The novel ideas presented
here have been implemented and proven in two high-volume,
commercial single-chip radios developed at Texas Instruments:
Bluetooth and GSM.

While the focus of the book is on RF frequency synthesizer
design, the techniques can be applied to the design of other
digitally assisted analog circuits as well. This book is a
must-read for students and engineers who want to learn a new
paradigm for RF frequency synthesis and wireless transmitter design
using digitally intensive design techniques.

Autorentext

ROBERT BOGDAN STASZEWSKI, PhD, is a Distinguished Member of
Technical Staff with the Digital RF Processor Group of Texas
Instruments, where he co-invented and developed the Digital RF
Processor (DRPTM), a novel, all-digital transmitter and digitally
intensive direct-sampling receiver architecture. Before joining
Texas Instruments, Dr. Staszewski worked with Alcatel Network
Systems as a design engineer.

PORAS T. BALSARA, PhD, is Professor of Electrical
Engineering at the Erik Jonsson School of Engineering and Computer
Science, The University of Texas at Dallas, where he teaches and
conducts research in high-speed, low-power circuit design, VLSI
circuits and architectures for signal processing and communication,
and reconfigurable systems. He is also the Director of the
University's Center for Integrated Circuits and Systems.

Zusammenfassung
A new and innovative paradigm for RF frequency synthesis and wireless transmitter design Learn the techniques for designing and implementing an all-digital RF frequency synthesizer. In contrast to traditional RF techniques, this innovative book sets forth digitally intensive design techniques that lead the way to the development of low-cost, low-power, and highly integrated circuits for RF functions in deep submicron CMOS processes. Furthermore, the authors demonstrate how the architecture enables readers to integrate an RF front-end with the digital back-end onto a single silicon die using standard ASIC design flow.

Taking a bottom-up approach that progressively builds skills and knowledge, the book begins with an introduction to basic concepts of frequency synthesis and then guides the reader through an all-digital RF frequency synthesizer design:

• Chapter 2 presents a digitally controlled oscillator (DCO), which is the foundation of a novel architecture, and introduces a time-domain model used for analysis and VHDL simulation
• Chapter 3 adds a hierarchical layer of arithmetic abstraction to the DCO that makes it easier to operate algorithmically
• Chapter 4 builds a phase correction mechanism around the DCO such that the system's frequency drift or wander performance matches that of the stable external frequency reference
• Chapter 5 presents an application of the all-digital RF synthesizer
• Chapter 6 describes the behavioral modeling and simulation methodology used in design
  The final chapter presents the implementation of a full transmitter and experimental results. The novel ideas presented here have been implemented and proven in two high-volume, commercial single-chip radios developed at Texas Instruments: Bluetooth and GSM.

While the focus of the book is on RF frequency synthesizer design, the techniques can be applied to the design of other digitally assisted analog circuits as well. This book is a must-read for students and engineers who want to learn a new paradigm for RF frequency synthesis and wireless transmitter design using digitally intensive design techniques.

Inhalt

PREFACE xiii

1 INTRODUCTION 1

1.1 Frequency Synthesis 1

1.1.1 Noise in Oscillators 2

1.1.2 Frequency Synthesis Techniques 5

1.2 Frequency Synthesizer as an Integral Part of an RF Transceiver 9

1.2.1 Transmitter 10

1.2.2 Receiver 11

1.2.3 Toward Direct Transmitter Modulation 12

1.3 Frequency Synthesizers for Mobile Communications 16

1.3.1 Integer-N PLL Architecture 17

1.3.2 Fractional-N PLL Architecture 18

1.3.3 Toward an All-Digital PLL Approach 23

1.4 Implementation of an RF Synthesizer 25

1.4.1 CMOS vs. Traditional RF Process Technologies 25

1.4.2 Deep-Submicron CMOS 25

1.4.3 Digitally Intensive Approach 26

1.4.4 System Integration 27

1.4.5 System Integration Challenges for Deep-Submicron CMOS 29

2 DIGITALLY CONTROLLED OSCILLATOR 30

2.1 Varactor in a Deep-Submicron CMOS Process 31

2.2 Fully Digital Control of Oscillating Frequency 33

2.3 LC Tank 35

2.4 Oscillator Core 37

2.5 Open-Loop Narrowband Digital-to-Frequency Conversion 39

2.6 Example Implementation 45

2.7 Time-Domain Mathematical Model of a DCO 47

2.8 Summary 51

3 NORMALIZED DCO 52

3.1 Oscillator Transfer Function and Gain 52

3.2 DCO Gain Estimation 53

3.3 DCO Gain Normalization 54

3.4 Principle of Synchronously Optimal DCO Tuning Word Retiming 55

3.5 Time Dithering of DCO Tuning Input 56

3.5.1 Oscillator Tune Time Dithering Principle 56

3.5.2 Direct Time Dithering of Tuning Input 57

3.5.3 Update Clock Dithering Scheme 59

3.6 Implementation of PVT and Acquisition DCO Bits 60

3.7 Implementation of Tracking DCO Bits 64

3.7.1 High-Speed Dithering of Fractional Varactors 64

3.7.2 Dynamic Element Matching of Varactors 70

3.7.3 DCO Varactor Rearrangement 71

3.8 Time-Domain Model 73

3.9 Summary 74

4 ALL-DIGITAL PHASE-LOCKED LOOP 76

4.1 Phase-Domain Operation 77

4.2 Reference Clock Retiming 79

4.3 Phase Detection 81

4.3.1 Difference Mode of ADPLL Operation 85

4.3.2 Integer-Domain Operation 86

4.4 Modulo Arithmetic of the Reference and Variable Phases 86

4.4.1 Variable-Phase Accumulator (PV Block) 89

4.5 Time-to-Digital Converter 91

4.5.1 Frequency Reference Edge Estimation 93

4.6 Fractional Error Estimator 94

4.6.1 Fractional-Division Ratio Compensation 96

4.6.2 TDC Resolution Effect on Estimated Frequency Resolution 97

4.6.3 Active Removal of Fractional Spurs Through TDC (Optional) 98

4.7 Frequency Reference Retiming by a DCO Clock 100

4.7.1 Sense AmplifierBased Flip-Flop 102

4.7.2 General Idea of Clock Retiming 103

4.7.3 Implementation 104

4.7.4 Time…