The Designer's Guide to VHDL

Since the publication of the first edition of The Designer's Guide to VHDL in 1996, digital electronic systems have increased exponentially in their complexity, product lifetimes have dramatically shrunk, and reliability requirements have shot through the roof. As a result more and more designers have turned to VHDL to help them dramatically improve productivity as well as the quality of their designs.

VHDL, the IEEE standard hardware description language for describing digital electronic systems, allows engineers to describe the structure and specify the function of a digital system as well as simulate and test it before manufacturing. In addition, designers use VHDL to synthesize a more detailed structure of the design, freeing them to concentrate on more strategic design decisions and reduce time to market. Adopted by designers around the world, the VHDL family of standards have recently been revised to address a range of issues, including portability across synthesis tools.

This best-selling comprehensive tutorial for the language and authoritative reference on its use in hardware design at all levels--from system to gates--has been revised to reflect the new IEEE standard, VHDL-2001. Peter Ashenden, a member of the IEEE VHDL standards committee, presents the entire description language and builds a modeling methodology based on successful software engineering techniques. Reviewers on Amazon.com have consistently rated the first edition with five stars. This second edition updates the first, retaining the authors unique ability to teach this complex subject to a broad audience of students and practicing professionals.

• Details how the new standard allows for increased portability across tools.
• Covers related standards, including the Numeric Synthesis Package and the Synthesis Operability Package, demonstrating how they can be used for digital systems design.
• Presents four extensive case studies to demonstrate and combine features of the language taught across multiple chapters.
• Requires only a minimal background in programming, making it an excellent tutorial for anyone in computer architecture, digital systems engineering, or CAD.

Autorentext

Peter J. Ashenden received his B.Sc.(Hons) and Ph.D. from the University of Adelaide, Australia. He was previously a senior lecturer in computer science and is now a Visiting Research Fellow at the University of Adelaide. His research interests are computer organization and electronic design automation. Dr. Ashenden is also an independent consultant specializing in electronic design automation (EDA). He is actively involved in IEEE working groups developing VHDL standards, is the author of The Designer's Guide to VHDL and The Student's Guide to VHDL and co-editor of the Morgan Kaufmann series, Systems on Silicon. He is a senior member of the IEEE and a member of the ACM.

Inhalt

1 Fundamental Concepts
2 Scalar Data Types and Operations
3 Sequential Statements
4 Composite Data Types and Operations
5 Basic Modeling Constructs
6 Case Study: A Pipelined Multiplier Accumulator
7 Subprograms
8 Packages and Use Clauses
9 Aliases
10 Case Study: A Bit-Vector Arithmetic Package
11 Resolved Signals
12 Generic Constants
13 Components and Configurations
14 Generate Statements
15 Case Study: The DLX Computer System
16 Guards and Blocks
17 Access Types and Abstract Data Types
18 Files and Input/Output
19 Case Study: Queuing Networks
20 Attributes and Groups
21 Miscellaneous Topics
A Synthesis
B The Predefined Package Standard
C IEEE Standard Packages
D Related Standards
E VHDL Syntax
F Differences
G Answers to Exercises
References
Index