Advanced Nanoelectronics

Brings novel insights to a vibrant research area with high application potential - covering materials, physics, architecture, and integration aspects of future generation CMOS electronics technology Over the last four decades we have seen tremendous growth in semiconductor electronics. This growth has been fueled by the matured complementary metal oxide semiconductor (CMOS) technology. This comprehensive book captures the novel device options in CMOS technology that can be realized using non-silicon semiconductors. It discusses germanium, III-V materials, carbon nanotubes and graphene as semiconducting materials for three-dimensional field-effect transistors. It also covers non-conventional materials such as nanowires and nanotubes. Additionally, nanoelectromechanical switches-based mechanical relays and wide bandgap semiconductor-based terahertz electronics are reviewed as essential add-on electronics for enhanced communication and computational capabilities. Advanced Nanoelectronics: Post-Silicon Materials and Devices begins with a discussion of the future of CMOS. It continues with comprehensive chapter coverage of: nanowire field effect transistors; two-dimensional materials for electronic applications; the challenges and breakthroughs of the integration of germanium into modern CMOS; carbon nanotube logic technology; tunnel field effect transistors; energy efficient computing with negative capacitance; spin-based devices for logic, memory and non-Boolean architectures; and terahertz properties and applications of GaN. -Puts forward novel approaches for future, state-of-the-art, nanoelectronic devices -Discusses emerging materials and architectures such as alternate channel material like germanium, gallium nitride, 1D nanowires/tubes, 2D graphene, and other dichalcogenide materials and ferroelectrics -Examines new physics such as spintronics, negative capacitance, quantum computing, and 3D-IC technology -Brings together the latest developments in the field for easy reference -Enables academic and R&D researchers in semiconductors to "think outside the box" and explore beyond silica An important resource for future generation CMOS electronics technology, Advanced Nanoelectronics: Post-Silicon Materials and Devices will appeal to materials scientists, semiconductor physicists, semiconductor industry, and electrical engineers.

Autorentext

Muhammad Mustafa Hussain, PhD, is Professor in the Electrical Engineering program of King Abdullah University of Science and Technology (KAUST), Saudi Arabia. Before joining KAUST, he was Program Manager of Emerging Technology Program in SEMATECH, Austin. His program was funded by DARPA NEMS, CERA and STEEP programs. His research interest is in expanding the horizon of CMOS electronics and technology for future applications.

Inhalt
Preface xi

**1 The Future of CMOS: MoreMoore or a New Disruptive Technology? 1
**Nazek El-Atab and Muhammad M. Hussain

1.1 FinFET Technology 2

1.1.1 State-of-the-Art FinFETs 3

1.1.1.1 FinFET with Si Channel 3

1.1.1.2 FinFET with High-Mobility Material Channel 4

1.1.1.3 FinFET with TMD Channel 5

1.1.1.4 SOI versus Bulk FinFET 5

1.1.2 Industrial State 6

1.1.3 Challenges and Limitations 7

1.2 3D Integrated Circuit Technology 8

1.2.1 Research State 9

1.2.1.1 Thermal Management 9

1.2.1.2 Through-silicon-vias 9

1.2.1.3 Bonding in 3D IC 10

1.2.1.4 Test and Yield 12

1.2.2 Industrial State 12

1.2.3 Challenges and Limitations 13

1.3 Neuromorphic Computing Technology 13

1.3.1 State-of-the-Art NonvolatileMemory as a Synapse 14

1.3.1.1 Phase Change Memory 15

1.3.1.2 Conductive-Bridging RAM 16

1.3.1.3 Filamentary RRAM 17

1.3.2 Research Programs and Industrial State of Neuromorphic Computing 18

1.4 Quantum Computing Technology 19

1.4.1 Quantum Bit Requirement 20

1.4.2 Research State 20

1.4.2.1 Spin-Based Qubits 20

1.4.3 Superconducting Circuits for Quantum Information 21

1.4.4 Industry State 22

1.4.5 Challenges and Limitations to Quantum Computing 23

References 23

**2 Nanowire Field-Effect Transistors 33
**Debarghya Sarkar, Ivan S. Esqueda, and Rehan Kapadia

2.1 General Scaling Laws Leading to Nanowire Architectures 33

2.1.1 Scaling of Planar Devices and Off-state Leakage Current 33

2.1.2 FinFET and UTB Devices for Improved Electrostatics 35

2.1.3 Nanowires as the Ultimate Limit of Electrostatic Control 37

2.1.4 Quantum Effects 39

2.1.5 Drive Current 43

2.2 Nanowire Growth and Device Fabrication Approaches 43

2.2.1 Bottom-up VLS Growth 43

2.2.2 Top-down Oxidation 45

2.3 State-of-the-Art Nanowire Devices 45

2.3.1 Silicon Devices 45

2.3.2 IIIV Devices 46

References 49

**3 Two-dimensional Materials for Electronic Applications 55
**Haimeng Zhang and HanWang

3.1 2D Materials Transistor and Device Technology 56

3.1.1 Operation and Characteristics of 2D-Materials-Based FETs 57

3.1.2 Ambipolar Property of Graphene 57

3.1.3 Important Figures of Merit 58

3.1.3.1 IonIoff Ratio 58

3.1.3.2 Subthreshold Swing 59

3.1.3.3 Cutoff Frequency and Maximum Frequency of Oscillation 59

3.1.3.4 Minimum Noise Figure 60

3.1.4 Device Optimization 61

3.1.4.1 Mobility Engineering 61

3.1.4.2 Current Saturation 62

3.1.4.3 Metal Contact 63

3.2 Graphene Electronics for Radiofrequency Applications 64

3.2.1 Experimental Graphene RF Transistors 65

3.2.2 Graphene-Based Integrated Circuits 67

3.2.2.1 Graphene Ambipolar Devices 67

3.2.2.2 Graphene Oscillators 73

3.2.2.3 Graphene RF Receivers 73

3.2.2.4 Graphene Electromechanical Devices: Resonators and RF Switches 74

3.3 MoS2 Devices for Digital Application 76

3.3.1 ExperimentalMoS2 Transistors 77

3.3.2 MoS2-Based Integrated Circuits 78

3.3.2.1 Direct-Coupled FET Logic Circuits 78

3.3.2.2 Logic Gates 79

3.3.2.3 A Static Random Access Memory Cell based on MoS2 82

3.3.2.4 Ring Oscillators based on MoS2 82

3.3.2.5 Microprocessors based on MoS2 85

References 87

**4 Integration of Germanium intoModern CMOS: Challenges and Breakthroughs 91
**Wonil Chung, HengWu, and Peide D. Ye

4.1 Introduction 91

4.2 Junction Formation for Germanium MOS Devices 92

4.2.1 Charge Neutrality Level and Fermi Level Pinning 92

4.2.2 Metal/Ge Contacts 93 4.2.2...